FPGA Development Board (XC3S250E)

FPGA Development Board (XC3S250E)

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Quick Overview

Papilio One board fully assembled with a Xilinx XC3S250E and 4Mbit SST SPI Flash memory.

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Specifications Power Four independent power rails at 5V, 3.3V, 2.5V, and 1.2V. Power supplied by a power connector or USB. USB Two channel USB connection for JTAG and serial communications implemented with FT2232. EEPROM memory to store configuration settings for FT2232 USB chip. Spartan 3E FPGA 32MHz oscillator that can be used by Xilinx's DCM to generate any required clock speed. VTQFP-100 footprint that supports Xilinx XC3S100E, XC3S250E, and XC3S500E parts. Bank 0-3 can be jumpered to support 1.2V, 2.5V, or 3.3V. JTAG, Serial, and power connections are routed to the the top header. Power and GPIO are routed to the side headers. Board can be used with Bread Boards if only the outside row of the side headers is populated.

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